%FILENAME%
fusesoc-2.3-1-any.pkg.tar.zst

%NAME%
fusesoc

%BASE%
fusesoc

%VERSION%
2.3-1

%DESC%
Package manager and build abstraction tool for FPGA/ASIC development

%CSIZE%
119342

%ISIZE%
661404

%MD5SUM%
3d65dd58abed9f78d42dc6447734ff00

%SHA256SUM%
63eeb6103703e65c446338c91b82e9ffd31b76d4fdb3f6f387361ee721441293

%PGPSIG%
iQEzBAABCAAdFiEEFRnVq6Zb9vwrc8dWek52CV2KUuQFAmW+dfoACgkQek52CV2KUuQODwf/fRHjagz+DjB4e4O0ZZcmo/93RWUNzIVxx1os5sJFIdFQJl6pjUPJJNx1u6mgAckHKarHhuZZvTpqAvlJ4pDUS+4rf547juh41tiaLBqk+jExlpC0LWhk8DrwHZOXhWPTYN9Tm0b4udIopazcosfmqkrh7fEZMPgeOEw+vb3d9NbkPNKsUEZiKoqvu2Q0266TNZhmImwv4pwhy7Z7AflQNLXQVDnFO7QMsRRXFbrXvB8QjNpSnOWc7jOtvCZV0dI+dz7J2SUBmn/1igeDLBVxBwP4YcBkuAWFIQQESTReff11LjEP1i5NmG3LE93naWqRlR9tPWMVACV4+UGxZNiO/g==

%URL%
https://github.com/olofk/fusesoc

%LICENSE%
BSD

%ARCH%
any

%BUILDDATE%
1706980838

%PACKAGER%
Antonio Rojas <arojas@archlinux.org>

%DEPENDS%
python
python-edalize
python-pyparsing
python-yaml
python-simplesat
python-fastjsonschema

%OPTDEPENDS%
iverilog: run simulation/testbenchs
svn: opencores provider

%MAKEDEPENDS%
python-setuptools-scm

