%FILENAME%
verilator-4.228-1-x86_64.pkg.tar.zst

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.228-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
4952009

%ISIZE%
23287673

%MD5SUM%
77e4faf781ed1d2004fde095b99a1ba1

%SHA256SUM%
3ec6ed1784dd34920e9c7204f70d4136529dd774ab98174843d1cdfdef1a360d

%PGPSIG%
iQIzBAABCAAdFiEEtZcfLFwQqaCMYAMPeGxj8zDXy5IFAmM4k7kACgkQeGxj8zDXy5Iq7xAAjtcuMShGsmq5qQR/E/Is3Gjr/Ms9g9s9rTWXX1qP9O1u5Jn1HG1At3Zo6aOjwkobalolBiieNBxzRS7egaS2/nrACIHUb2euH2Lj10FFWItwpaeQcslnlTVTUT6JpHH/wcb4ELzVeVXPmREgPHbBSuCLHqGMTBc/m1nSR9rqXBw2Ruvf8oIe9K9dPayQfJWWZGMadSLtxyqBkbmH9OS6SAgEQrYUGD1jVX1AMm01k5u6EwN3Jayp5cL3SpHDAeWbfT8iiSLD5CrbZXIf02FV+kGR4PLAkhiv9TbhAFR25uPrfZl2xv7B/tgOGyAFV8L0iE7ubOhPm64b3cix5vIoaNank7y48zCJLNTepLP7OECY/DLJXkCF3/hl4KFrkndNFXETw59Epdj8pXpMuzsn/GAgPZ4N+VVGolDRDeawHB6YhtQT+8TekDXbgVpbu8MjLLxas4CQaiaZj9R9oDVtsCs9MSpEBnfp7fv71VZBcfMt5+1bH0VbE7zApSYLXVSdWsWc+EU9EJtPiHqjXRlqm0GsdnJQRWiEp8w4I2pUNCRDOUyL6StQruaHHkluwhJ/LX8CTslyRRSpdGSy4ZyzZgWGfQTBi+YHQkS6oTY4nvZ649kIoSjW8IfPA6eeoaCdIcLD31C2j6FlX9tLhGvFnJbmAgBleiu5GJLsofXb8nA=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
x86_64

%BUILDDATE%
1664652040

%PACKAGER%
Felix Yan <felixonmars@archlinux.org>

%DEPENDS%
perl

%OPTDEPENDS%
systemc

%MAKEDEPENDS%
python
systemc
lsb-release

