%FILENAME%
verilator-4.218-1-x86_64.pkg.tar.zst

%NAME%
verilator

%BASE%
verilator

%VERSION%
4.218-1

%DESC%
The fastest free Verilog HDL simulator

%CSIZE%
4703969

%ISIZE%
22145662

%MD5SUM%
53f8d427792f3e53152515cd0d61a41b

%SHA256SUM%
6a159d9a8675caa1caa41494e71d33052f9ab06aec1ac18d2bd1d0193fa95736

%PGPSIG%
iQIzBAABCAAdFiEEtZcfLFwQqaCMYAMPeGxj8zDXy5IFAmHp6d0ACgkQeGxj8zDXy5JeihAApHFHh0qVT5yoRH+/pdxvbLuEw1enmFujvGgvqwsJEfa+dmjnq+4LpjBuZzBJirxiaBrIT54gRoAbhxGxXmpYlXFFiLbeAuj0Gf12Jn7CMDDG3OJ35gmTjRK4M9IzHRWo7u7Zs3XS5yxsDFfyGUpWxGNjIPm1/4ei0ZfyjqO5tK31B/xJc2iV9/6fhbN6FfYmy6NH6MHTpVXCFPYos/nTkgCPfNS6spnEajhO9DojQxe62Yl1y2BdRja2lHgqor99SUGHJEwDGcXwQnowiqArQ5ynIgqJOoMfp7LzTyzliw6cq6pyWf/riKB6fScYEbWcDsTTKhYPZ6Yk/Ts1U9TAQR214u1YmkFZy39XGoNAljDP1WP6ED0FXH06T2WBNMbznlYHZ5s9M9mpoeOUY4xIRg0YWww32/XHPVFhRswvJQmaZxPxnQF7def39PFUHR7hkH6u5ksdn/+vTup/es1XGrrA+3h8NjJgZ5rLB6OZEpL7R71Cj1G2Fp3pYg18FLWA+1uLjP8rPQAMDrsA6fRUN/3RbFqcT5k4cZt2QFBPjboer7JMSeHeC1djC1ojH2pzuJGZoOn/UDdf+JDwoSioDIMqtiOtaLrMk2f1tbvJf49Mh14pUr5xqMkrBAt7teuljSCkoLRq+VWd9phJ4Kgt3avIz+NclKerqdBWUEKZYQE=

%URL%
https://www.veripool.org/projects/verilator/wiki/Intro

%LICENSE%
LGPL

%ARCH%
x86_64

%BUILDDATE%
1642719592

%PACKAGER%
Felix Yan <felixonmars@archlinux.org>

%DEPENDS%
perl

%OPTDEPENDS%
systemc

%MAKEDEPENDS%
python
systemc

